In many areas of the electronics industry, designers are turning toward lower operating voltages. Lower voltages lead to increased battery life, reduced product weight, and enable integrated circuits to be smaller and more dense. This is particularly advantageous to designers of portable electronic devices. For example, in the early 1990's, most cellular telephones were designed using 5 volt circuitry.
However, the current trend is toward using circuitry having operating voltages in the range of 2.5 to 3.0 volts, and even lower voltages may be used in the future.
While reduced operating voltages are beneficial in extending useful battery life, the lower voltages may adversely circuit operation. For example, as circuit supply voltages are reduced, the range of circuit signal voltages are also reduced, thereby increasing the effects of noise. Furthermore, typical amplifier circuitry cannot output a voltage that covers the full range of the supply voltage. Rather, the output voltage is often limited to values no closer that a few tenths of a volt to the supply rails. This minimum voltage differential between a supply rail and the output voltage, referred to herein as "headroom," is a function of circuit design and varies little with changes in supply voltage. Thus, as supply voltages are reduced, headroom occupies a larger fraction of the available output voltage range.
One particular application in which lower operating voltages adversely impact circuit operation is in phase-locked loop (PLL) circuitry. PLLs are used in a wide range of applications, primarily involving forms of communication. For example, phase-locked loops are used to recover the carrier frequency from a radio transmission, to recover a data clock from a digital bit stream, and to track the frequency of a signal. Phase-locked loops are also used to modulate and demodulate the frequency or phase of a signal, to synthesize accurate frequencies for radio transmission and reception, and many other applications.
In its most basic form, a PLL includes a phase detector and a voltage controlled oscillator (VCO). The phase detector produces an error signal, or control voltage, based on a phase difference between the VCO output signal and a reference frequency. The control voltage in turn determines the frequency of the VCO. Thus, the phase detector provides feedback so that the VCO oscillates at the reference frequency. Additional details of the operation of a phase-locked loop are discussed hereinbelow. A more thorough treatment may be found in Phase-Locked Loop Circuit Design, Dan H. Wolaver, Prentice Hall, 1991, which is incorporated in its entirety herein by this reference.
Reduced circuit operating voltages adversely impact PLL operation in a number of ways. First, reduced supply voltages reduce the available range of the control voltage supplied to the VCO, thereby limiting the available frequency range of the PLL. This limitation is made more severe because of the headroom characteristics of typical phase detector circuitry, which further reduce the available control voltage range.
Although not caused by reduced operating voltages, PLL circuits generally exhibit a non-linear relationship between control voltage and output frequency. This makes PLL feedback loop compensation more difficult since loop gain changes with VCO operating point. Generally, feedback loop compensation is determined at the VCO operating point having the highest loop gain, causing the PLL to be over-compensated through much of its operating range. Such over-compensation may adversely impact applications in which the PLL circuitry must be able to rapidly switch frequencies. For example, in the time division multiplexing scheme specified for GSM cellular telephones, the PLL circuitry must be able to change frequencies in one time slot, or about 570 microseconds. Over-compensated PLL circuitry may have difficulty settling at the new operating frequency in the required time.
It would therefore be desirable to provide circuits and methods for amplifiers having an operating voltage of less than about 5 volts, and preferably in the range of less than about 3 volts.
It would also be desirable to provide circuits and methods for providing low voltage amplifiers without sacrificing output voltage range.
In addition, it would be desirable to provide circuits and methods for phase-locked loops having an operating voltage of less than about 5 volts, and preferably in the range of less than about 3 volts.
It would also be desirable to provide circuits and methods for providing low voltage phase-locked loops without sacrificing frequency range.
Furthermore, it would be desirable to provide circuits and methods for providing a phase-locked loop having a nearly-linear control voltage-to-frequency transfer function over the PLL's entire frequency range.